approach to algorithms

A popular direction in large-scale algorithm R&D is the design of parallel algorithms that can solve larger problems faster by exploiting the natural parallelism of supercomputers and computer clusters (e.g., the grid). Although this approach is effective in solving certain types of problems, it suffers from three important shortcomings:

		1 the algorithms must be designed to fit the architecture of the underlying machine(s), which usually leads to significant slow-downs arising from the so-called “von Neumann bottleneck;”
		2 the algorithms must also be designed to fit the network architecture, i.e., the topology and communication protocols that interconnect the processors in the supercomputer or cluster, which can lead to serious scalability issues; and
		3 the equipment and infrastructure necessary to run the algorithms is often expensive and not readily available.

Accelogic is pioneering a totally different approach to numerical algorithm R&D. Instead of designing the algorithm to fit a given architecture, we design the algorithm jointly with the architecture. When done right, this approach enables the discovery of astonishingly efficient algorithms free of the so-called “von Neumann bottleneck,” and with virtually linear scalability for very large problem sizes.
 
Our approach is enabled by recent advances in the field of reconfigurable computing, thanks to which it is now possible to “program” hardware architectures on general-purpose “computer boards” in an affordable way, similar to the way traditional algorithms are programmed in software.

patents

If you want to learn more about our technology, take a look of our patented work (you may need a password to see this page; you can ask for one at )